#ifndef HARDWARE_SPI_H_
#define HARDWARE_SPI_H_

typedef struct
{
	volatile unsigned ctrl;
	volatile unsigned cfg;
	volatile unsigned msk;
	volatile unsigned st;
	volatile unsigned buf;
} SpiRegs;

#define SPI_CTRL_SSS_HIGH   (1U << 3)
#define SPI_CTRL_SSS_LOW    (0U << 3)
#define SPI_CTRL_TXBS_RST   (1U << 2)
#define SPI_CTRL_RXBS_RST   (1U << 1)
#define SPI_CTRL_EN         (1U << 0)

#define SPI_CFG_SADDR       (1U << 24)
#define SPI_CFG_BR(_x)      ((((_x) >> 1) & 0xFF) << 16)
#define SPI_CFG_FIL         (1U << 10)
#define SPI_CFG_SYN         (1U << 9)
#define SPI_CFG_RXO         (1U << 8)
#define SPI_CFG_EN_TX       (1U << 7)
#define SPI_CFG_TR_MOD      (1U << 6)
#define SPI_CFG_SS_CTRL     (1U << 5)
#define SPI_CFG_DWW         (1U << 4)
#define SPI_CFG_BO_LSB      (1U << 3)
#define SPI_CFG_BO_MSB      (0U << 3)
#define SPI_CFG_POL_H       (1U << 2)
#define SPI_CFG_POL_L       (0U << 2)
#define SPI_CFG_PHA_POS     (1U << 1)
#define SPI_CFG_PHA_NEG     (0U << 1)
#define SPI_CFG_MOD_MASTER  (1U << 0)
#define SPI_CFG_MOD_SLAVE   (0U << 0)

#define SPI_MSK_NULL_BUF    (1U << 4)
#define SPI_MSK_RX_NE       (1U << 3)
#define SPI_MSK_MOD_FIAL    (1U << 2)
#define SPI_MSK_TXB_E       (1U << 1)
#define SPI_MSK_RXB_OV      (1U << 0)

#define SPI_ST_NULL_BUF (1U << 6)
#define SPI_ST_BUSY     (1U << 5)
#define SPI_ST_TXB_OV   (1U << 4)
#define SPI_ST_RX_NE    (1U << 3)
#define SPI_ST_MOD_FAIL (1U << 2)
#define SPI_ST_TXB_E    (1U << 1)
#define SPI_ST_RXB_OV   (1U << 0)

#endif /* HARDWARE_SPI_H_ */

