# Release Notes for STM32F1xx CMSIS

Copyright © 2016 STMicroelectronics

# License

This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at:
https://opensource.org/licenses/BSD-3-Clause

# Update History

V4.3.2 / 07-September-2020

## Main Changes

- Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS
- SystemInit(): update to don’t reset RCC registers to its reset values.
- TIM:
  - Remove unused IS_TIM_SYNCHRO_INSTANCE() assert macro
- I2S:
  - Add missing I2SCFG and I2SPR bits difinitions for STM32F101xE and STM32F101xG

V4.3.1 / 26-June-2019

## Main Changes

- Fix MISRA C 2012 Compilation errors: update to use “UL” postfix for bits mask definitions(_Msk) and memory/peripheral base addresses
- Fix wrong initialization value for “SystemCoreClock” in System_stm32f1xx.c file
- Update gcc linker file template to be aligned with AC6 linker file template
- stm32f1xx.h
  - Align ErrorStatus typedef to common error handling
- TIM:
  - Update IS_TIM_SLAVE_INSTANCE() macro to add reference to TIM9 instance
- SDMMC:
  - Remove SDIO_TypeDef() structure, SDIO_BASE define and SDIO Bits definitions : feature not available on all devices except STM32F103xE and STM32F103xG
- USB:
  - Add new PCD/HCD macros:
    - IS_PCD_ALL_INSTANCE()
    - IS_HCD_ALL_INSTANCE()
- SPI:
  - Add new SPI_CRC_ERROR_WORKAROUND_FEATURE define to enable SPI CRC workaround feature for STM32F101xE/STM32F103xE devices

V4.3.0 / 09-October-2018

## Main Changes

- Add missing IS_TIM_SYNCHRO_INSTANCE macro definition to check TIM SYNCHRO feature instance support.

V4.2.0 / 31-March-2017

## Main Changes

- Use _Pos and _Mask macros for all Bit Definitions
- Remove Core-CM3 bit definitions from CMSIS devices drivers: duplicated with bit definitions in core_cm3.h.
- General updates in header files to support LL drivers
  - Remove TIM SMCR OCCS and TIM CCER CC4NP bit definitions
  - Add new USART defines: USART_CR1_OVER8 and USART_CR3_ONEBIT
  - Add I2C_DR_DR bit definition
  - Add new I2C macros: IS_SMBUS_ALL_INSTANCE
  - Add new LL I2S defines: SPI_I2S_SUPPORT and I2S2_I2S3_CLOCK_FEATURE
  - Rename DAC instance to DAC1
  - Rename PWR_CR_PLS_XXX to PWR_CR_PLS_LEVX
  - Add RCC LL defines
    - RCC_HSE_MIN
    - RCC_HSE_MAX
    - RCC_MAX_FREQUENCY
    - RCC_PLL_SUPPORT
    - RCC_PLLI2S_SUPPORT
  - Add new TIM macros to check TIM feature instance support:
    - IS_TIM_COUNTER_MODE_SELECT_INSTANCE()
    - IS_TIM_ADVANCED_INSTANCE
    - IS_TIM_ETR_INSTANCE
    - IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
    - IS_TIM_32B_COUNTER_INSTANCE
    - IS_TIM_BREAK_INSTANCE()
    - IS_TIM_CCXN_INSTANCE()
    - IS_TIM_REPETITION_COUNTER_INSTANCE()
    - IS_TIM_COMMUTATION_EVENT_INSTANCE()

V4.1.0 / 29-April-2016

## Main Changes

- Add _Pos and _Msk defines to be used with _VAL2FLD(field, value) and _FLD2VAL(field, value).
  - The previous naming are kept for backward compatibility.
- RCC: Add define RCC_CFGR_MCOSEL for compatibility across all STM32 series.
- ADC: Add define ADC_MULTIMODE_SUPPORT for devices supporting the ADC multimode feature.
- ADC: Add define ADC_SR_EOS and ADC_SR_JEOS for compatibility accross all STM32 series.
- stm32f1xx.h: Replace __STM32F1xx_CMSIS_DEVICE_VERSION_MAIN by __STM32F1_CMSIS_VERSION_MAIN for MISRA compliancy on define length name.
- Add APBPrescTable constant to list APB prescalers values.
- Add FLASHSIZE_BASE for the FLASH Size register base address.
- Add UID_BASE for the unique device ID register base address.

V4.0.2 / 18-December-2016

## Main Changes

- FLASH: Add FLASH_OBR_DATA0 and FLASH_OBR_DATA1 for FLASH_OBR register.
- WWDG: Align bit name across all STM32 families.
  - WWDG_CR_T0 renmaed to WWDG_CR_T_0.
  - WWDG_CFR_W0 renamed to WWDG_CFR_W_0.
  - WWDG_CFR_WDGTB0 renamed to WWDG_CFR_WDGTB_0.
  - WWDG_CFR_WDGTB1 renamed to WWDG_CFR_WDGTB_1.
- Interrupt: Add HardFault_IRQn with value -13.
- EXTI:: Align bit name across all STM32 families.
  - EXTI_IMR_MR0 renamed to EXTI_IMR_IM0.
  - EXTI_EMR_MR0 renamed to EXTI_EMR_EM0.
  - EXTI_RTSR_TR0 renamed to EXTI_RTSR_RT0.
  - EXTI_FTSR_TR0 renamed to EXTI_FTSR_FT0.
  - EXTI_SWIER_SWIER0 renamed to EXTI_SWIER_SWI0.
  - EXTI_PR_PR0 renamed to EXTI_PR_PIF0.
  - Aliases are created for backward compatibilities.
- USB OTG: Remove USB_OTG_GCCFG_NOVBUSSENS from USB_OTG_GCCFG as this feature is not present in F1 devices.
- USB_OTG: Remove USB_OTG_GCCFG_I2CPADEN from USB_OTG_GCCFG as this feature is not present in F1 devices.
- ADC: Add the notion of common instance for compatibility with other STM32 families.

V4.0.1 / 31-July-2015

## Main Changes

- Remove __IO or __I on constant table declaration (AHBPrescTable in system_stm32f1xx.c) due to issue with mbed C++ code. The table content was filled with random value at initialization phase.
- uint8_t alignment done on CMSIS CRC registers structure.
- Removing definition of FLASH_WRP1_WRP1, FLASH_WRP1_nWRP1, FLASH_WRP2_WRP2, FLASH_WRP2_nWRP2, FLASH_WRP3_WRP3 and FLASH_WRP3_nWRP3 for product STM32F101x6, STM32F102x6 and STM32F103x6. Those defines are not applicable to those products.

V4.0.0 / 16-December-2014

## Main Changes

- Update based on STM32Cube specification
- This version has to be used only with STM32CubeF1 based development

V3.6.3 / 10-April-2014

## Main Changes

- Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.10 version.

V3.6.2 / 28-February-2013

## Main Changes

- stm32f10x.h
  - Change #define FLASH_ACR_LATENCY ((uint8_t)0x03) by #define FLASH_ACR_LATENCY ((uint8_t)0x07)
  - Remove ‘,’ from #define DMA_CCR7_PSIZE , ((uint16_t)0x0300)

V3.6.1 / 09-March-2012

## Main Changes

- All source files: license disclaimer text update and add link to the License file on ST Internet.

V3.6.0 / 27-January-2012

## Main Changes

- Update directory structure to be compliant with CMSIS V2.1
- All source files: update disclaimer to add reference to the new license agreement
- stm32f10x.h
  - Add define for Cortex-M3 revision __CM3_REV
  - Allow modification of some constants by the application code, definition of these constants is now bracketed by #if !defined. The concerned constant are HSE_VALUE, HSI_VALUE and HSE_STARTUP_TIMEOUT
  - Add missing bits definition for DAC CR register
  - Add missing bits definition for FSMC BTR1, _BTR2__, BTR3, BWTR1, BWTR2, BWTR3 and BWTR4 registers
  - Definition for Flash keys moved from stm32f10x_flash.c to stm32f10x.h
- V3.5.0 (based CMSIS V1.3) vs. V3.6.0 (based on CMSIS V2.1) compatibility update
  - Due to the directory structure difference between CMSIS V1.3 and V2.1, when migrating a project based on STM32F10x drivers V3.5.0 to V3.6.0 you need to perform the following update:
    - Rename ADC1_COMP_IRQn to ADC1_IRQn
    - In the compiler preprocessor, remove CortexM3 CMSIS include path. CortexM3 CMSIS files are included by default in your development toolchain
    - Remove core_cm3.c file (if it is used). Almost of CortexM3 CMSIS_ function are provided as intrinsic by the compiler
    - In the compiler preprocessor, update path of _STM32F10x CMSIS include files from Libraries332F10x to Libraries32F10x
    - In the project settings, update path of startup_stm32f10x_xx.s file from Libraries332F10x”Compiler” to Libraries32F10x”Compiler” where, “Compiler” refer to arm, gcc_ride7, iar, TASKING or TrueSTUDIO

V3.5.0 / 11-March-2011

## Main Changes

- stm32f10x.h and startup_stm32f10x_hd_vl.s files: remove the FSMC interrupt definition for STM32F10x High-density Value line devices.
- system_stm32f10x.c file provided within the CMSIS folder.

V3.4.0 / 15-October-2010

## Main Changes

- General
  - Add support for STM32F10x High-density Value line devices.
- STM32F10x CMSIS Device Peripheral Access Layer
  - STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File: stm32f10x.h
    - Update to support High-density Value line devices
      - Add new define STM32F10X_HD_VL
      - RCC, AFIO, FSMC bits definition updated
    - All STM32 devices definitions are commented by default. User has to select the appropriate device before starting else an error will be signaled on compile time.
    - Add new IRQs definitions inside the IRQn_Type enumeration for STM23 High-density Value line devices.
    - “bool” type removed.
- STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files: system_stm32f10x.h and system_stm32f10x.c
  - “system_stm32f10x.c” moved to to “STM32F10x_StdPeriph_Template” directory. This file is also moved to each example directory under “STM32F10x_StdPeriph_Examples”.
  - SystemInit_ExtMemCtl() function: update to support High-density Value line devices.
  - Add “VECT_TAB_SRAM” inside “system_stm32f10x.c” to select if the user want to place the Vector Table in internal SRAM. An additional define is also to specify the Vector Table offset “VECT_TAB_OFFSET”.
- STM32F10x CMSIS startup files:startup_stm32f10x_xx.s
  - Add three startup files for STM32 High-density Value line devices: startup_stm32f10x_hd_vl.s

V3.3.0 / 16-April-2010

## Main Changes

- General
  - Add support for STM32F10x XL-density devices.
  - Add startup files for TrueSTUDIO toolchain
- STM32F10x CMSIS Device Peripheral Access Layer
  - STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File: stm32f10x.h
    - Update to support XL-density devices
      - Add new define STM32F10X_XL
      - Add new IRQs for TIM9..14
      - Update FLASH_TypeDef structure
      - Add new IP instances TIM9..14
      - RCC, AFIO, DBGMCU bits definition updated
    - Correct IRQs definition for MD-, LD-, MD_VL- and LD_VL-density devices (remove comma “,” at the end of enum list)
  - STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files: system_stm32f10x.h and system_stm32f0xx.c
    - SystemInit_ExtMemCtl() function: update to support XL-density devices
    - SystemInit() function: swap the order of SetSysClock() and SystemInit_ExtMemCtl() functions.
  - STM32F10x CMSIS startup files:
    - add three startup files for STM32 XL-density devices: startup_stm32f10x_xl.s
    - startup_stm32f10x_md_vl.s for RIDE7: add USART3 IRQ Handler (was missing in previous version)
    - Add startup files for TrueSTUDIO toolchain

V3.2.0 / 01-March-2010

## Main Changes

- General
  - STM32F10x CMSIS files updated to CMSIS V1.30 release
  - Directory structure updated to be aligned with CMSIS V1.30
  - Add support for STM32 Low-density Value line (STM32F100x4/6) and Medium-density Value line (STM32F100x8/B) devices.
- CMSIS Core Peripheral Access Layer
- STM32F10x CMSIS Device Peripheral Access Layer
  - STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File: stm32f10x.h
    - Update the stm32f10x.h file to support new Value line devices features: CEC peripheral, new General purpose timers TIM15, TIM16 and TIM17.
    - Peripherals Bits definitions updated to be in line with Value line devices available features.
    - HSE_Value, HSI_Value and HSEStartup_TimeOut changed to upper case: HSE_VALUE, HSI_VALUE and HSE_STARTUP_TIMEOUT. Old names are kept for legacy purposes.
  - STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files: system_stm32f10x.h and system_stm32f10x.c
    - SystemFrequency variable name changed to SystemCoreClock
    - Default SystemCoreClock is changed to 24MHz when Value line devices are selected and to 72MHz on other devices.
    - All while(1) loop were removed from all clock setting functions. User has to handle the HSE startup failure.
    - Additional function void SystemCoreClockUpdate (void) is provided.
  - STM32F10x CMSIS Startup files: startup_stm32f10x_xx.s
    - Add new startup files for STM32 Low-density Value line devices: startup_stm32f10x_ld_vl.s
    - Add new startup files for STM32 Medium-density Value line devices: startup_stm32f10x_md_vl.s
    - SystemInit() function is called from startup file (startup_stm32f10x_xx.s) before to branch to application main. To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file
- GNU startup file for Low density devices (startup_stm32f10x_ld.s) is updated to fix compilation errors.